Conventionally, a transmission type liquid crystal display is widely used in which a thin film transistor (TFT) or a metal insulator metal (MIM) device is used as a switching element for driving and controlling each pixel electrode.
FIG. 22A is a partial enlarged plan view showing a pixel portion of an active matrix substrate in a conventional transmission type liquid crystal display which uses TFT's and which is disclosed in Japanese patent laid-open publication No. 9-152625. FIG. 22B is a cross sectional view taken along the line B-B of FIG. 22A. In the active matrix substrate of this transmission type liquid crystal display, a plurality of pixel electrodes are formed in a matrix.
As shown in FIG. 22A, around a pixel electrode 1, there are disposed scanning lines 2a and signal lines 2b. The scanning lines 2a are disposed parallel to each other and are used for supplying scanning signals to the pixel electrodes 1. The signal lines 2b are disposed parallel to each other and perpendicular to the scanning lines 2a. The signal lines 2b are used for supplying display signals to the pixel electrodes 1. The scanning lines 2a and the signal lines 2b are disposed such that a portion of each scanning line 2a and a portion of each signal line 2b overlap the peripheral portion of the pixel electrode 1. In the proximity of each of intersections between the scanning lines 2a and the signal lines 2b, there is disposed a thin film transistor (TFT) 3 which is coupled with the pixel electrode 1.
The gate electrode of the TFT 3 is coupled with the scanning line 2a, and the source electrode of the TFT 3 is coupled with the signal line 2b. The drain electrode of the TFT 3 is coupled with the pixel electrode 1 via a connecting electrode 4a and further via a contact hole 5, and is also coupled with an additional capacitance electrode 4b via the connecting electrode 4a. 
As shown in FIG. 22B, on a transparent insulating substrate 6, a gate electrode 3a, a gate insulating film 7a, and a semiconductor layer 8a are stacked in this order. On the central portion of the semiconductor layer 8a, a channel protection layer 8b is provided. Further, there is provided an amorphous silicon (n+ a-Si) layer which covers the semiconductor layer 8a and which is segmented on the channel protection layer 8b into a source electrode 3b and a drain electrode 3c. 
On an end portion of the source electrode 3b, there is disposed the signal line 2b having a two layer structure comprising a transparent conductive film and a metal layer. Also, on an end portion of the drain electrode 3c, there are disposed a transparent conductive film and a metal layer, and the transparent conductive film is extended as the connecting electrode 4a to couple the drain electrode 3c and the pixel electrode 1 together. The connecting electrode 4a is also connected to the additional capacitance electrode 4b. Further, an interlayer insulating film (passivation film) 9 is provided to cover the TFT 3, the scanning line 2a, the signal line 2b, and the connecting electrode 4a. 
An explanation will now be made on a manufacturing process of the active matrix substrate having the above-mentioned structure. First, on a transparent insulating substrate 6 made, for example, of glass and the like, a gate electrode 3a is formed. On an area including the gate electrode 3a and the like, a gate insulating film 7a and an amorphous silicon (a-Si) layer are formed one after another in this order. The amorphous silicon (a-Si) layer is patterned to form a semiconductor layer 8a. Next, on the semiconductor layer 8a and over the gate electrode 3a, a channel protection film 8b is formed. An amorphous silicon (n+ a-Si) layer is then formed to cover the channel protection layer 8b and the semiconductor layer 8a, and is patterned to form the source electrode 3b and the drain electrode 3c. 
On the source electrode 3b and the drain electrode 3c, an interlayer insulating film 9 comprising an organic film is formed, and a contact hole 5 is opened in the interlayer insulating film 9. Thereafter, an indium-tin-oxide (ITO) film is formed to cover the interlayer insulating film 9 by sputtering, and is patterned to form a plurality of transparent pixel electrodes 1 made of ITO.
In the above-mentioned process, it is preferable that, after forming the contact hole 5, the surface of the interlayer insulating film 9 comprising an organic film is ashed by using oxygen plasma. Thereby, it is possible to improve adhesion between the ITO film and the organic film and to avoid defective coupling between the ITO film and the metal film of the additional capacitance electrode.
The reason why the organic film having a lower relative permittivity value than that of an inorganic film is used as the interlayer insulating film 9 in place of the inorganic film hitherto used is to reduce cross talk between the signal lines and the pixel electrodes. That is, by using the organic film as the interlayer insulating film 9, it is possible to reduce capacitive coupling between the signal lines and the pixel electrodes when the pixel electrodes and the signal lines are partially overlapped to improve aperture ratio, and thereby it becomes possible to reduce the cross talk.
Conventionally, when the ITO film is formed on the interlayer insulating film 9 comprising the organic film, a high temperature sputtering method is used in which the transparent insulating substrate 6 is heated to improve patterning characteristics of the ITO film.
An example of a method of forming an ITO film which uses the high temperature sputtering is disclosed in Japanese patent No. 2520399. In this patent, it is described that a condition for forming an ITO film having good quality without causing deterioration of color filters is to set the temperature of a substrate between 180° C. and 250° C. In Japanese patent laid-open publication No. 9-152625 mentioned before, a condition of forming the ITO film is not described at all.
However, when the ITO film is formed by using the high temperature sputtering, the ITO film deteriorates due to outgassing from the organic insulating film, and patterning can not be done well, due to the generation of etching residue. This is especially prominent when wet etching is used.
In order to obviate such defects, it is conceivable to form the ITO film on the organic insulating film by using a low temperature sputtering or sputtering in a non-heated condition. However, when the low temperature sputtering is used, contact resistance between the ITO film and the metal film of the lower layer becomes large.
When the contact resistance becomes large, it becomes impossible to realize sufficient uniformity of the contact resistance in the substrate area. Insufficient uniformity of the contact resistance causes vertical striped unevenness of an image displayed on a display panel surface. The insufficient uniformity of the contact resistance has a large influence on the displayed image especially in a high resolution liquid crystal display panel in which, because of a narrow space between respective signal lines, signal terminals coupled with the signal lines are disposed on opposite sides alternately or disposed on opposite sides every plurality of signal terminals.
Also, when the contact resistance increases, a lateral cross talk phenomenon occurs in a twisted nematic (TN) type liquid crystal display panel having a common storage structure, or in an in-plane switching (IPS) type liquid crystal display panel.
That is, in the TN type liquid crystal display panel having the common storage structure, a common voltage potential is applied to common wiring conductors for constituting storage capacitors. Therefore, it is necessary to mutually couple the common wiring conductors. When a TFT substrate structure is used in which the common wiring conductors are mutually coupled by using an ITO film on an interlayer insulating film (passivation film), the contact resistance becomes high because the interlayer insulating film is made of an organic insulating film. Therefore, it is inevitable that the overall resistance of the common wiring conductors becomes high.